1. Field of the Invention
The present invention relates to providing a multichannel direct memory access (DMA) engine to support transfer of data across multiple channels in a multi-channel high speed network.
2. Art Background
Certain applications dictate the need for multiple DMA mechanisms. One technique is to provide multiple sets of DMA hardware to support the multiple devices that are performing DMA transfers. Another technique is to provide one set of DMA hardware that is configurable to support DMA transfers between a plurality of devices and memory. However, configuration or state information for each device must be maintained for rapid access by the DMA hardware. For speed purposes, it is desirable to maintain all the state information in memory located on the same component as the DMA hardware. If kept in on-chip memory, however, the cost can be significant if a large number of devices are supported.